แสงสุรีย์ วสุพงศ์อัยยะ

Curriculum Vitae

Position: อาจารย์

Office: Room R204
Department of Computer Engineering
Faculty of Engineering, Prince of Songkla University
Hatyai, Songkhla, 90112

Tel: +66 (0)74 287360

Fax: +66 (0)74 287076

Email: vsangsur@coe.psu.ac.th

Homepage: http://fivedots.coe.psu.ac.th/~vsangsur/

Education:

  • Ph.D., Computer Science, Portland State University, USA
  • MS., Computer Science, California State University Chico, USA
  • B.Eng, Computer Engineering, Prince of Songkla University, Thailand

Experences:

  • Lecturer, 2008-current, Prince of Songkla University, Thailand
  • Adjunct Faculty, 2006-2007, Portland State University, USA
  • Research Assistant, 2002-2005, Portland State University, USA
  • Teaching Assistant, 2000, California State University Chico, USA
  • Lecturer, 1996-1998, Prince of Songkla University, Thailand

Field of Interests:

  • High performance computer resource scheduling
  • Cryptography, Computer Security
  • Algorithm

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Professional and Honor Societies:

IEEE, ACM, Upsilon Pi Epsilon

Teaching Involvements:

At Prince of Songkla University

  • 241-304 Computer Operating System (1st Semester)
  • 241-548 Introduction to Cryptography (2nd Semester)
  • 241-549 Algorithm design and analysis (2nd Semester)

At Portland State University

  • CS105: Computing Fundamentals I
  • CS106: Computing Fundamentals II using Visual Basic .Net
  • CS200: Computer Systems Programming I
  • CS491/591: Introduction to Security

On-Going and Funded Research Projects:

Papers and Publications :


  • S.-H. Chiang & S. Vasupongayya, “Design and Potential Performance of Goal-oriented Job Scheduling Policies for Parallel Computer Workloads”, to appear., IEEE Trans. Parallel Distrib. Syst.

  • S. Vasupongayya “Goal-oriented Job Scheduling for Parallel Computer Systems”, Ph.D. thesis, Portland State University, Dec. 2007.

  • S. Vasupongayya & S.-H. Chiang, "Performance Problems of using System-predicted Runtimes for Parallel Job Scheduling", in Proc. of the IASTED PDCS07, Cambridge, MA, Nov 2007.


  • S. Vasupongayya & S.-H. Chiang, "Multi-Objective Models for Scheduling Jobs on Parallel Computer Systems", in Proc. of the 2006 IEEE Cluster, Barcelona, Spain, Sep 2006.


  • S. Vasupongayya, "Improving Search-based Parallel Job Scheduler", in Proc. of the PDPTA'06, Las Vegas, NV. Jun 2006.


  • S. Vasupongayya & S.-H. Chiang, "On Job Fairness in Non-Preemptive Parallel Job Scheduling", in Proc. of the IASTED PDCS05, Phoenix, AZ. Nov 2005.


  • S. Vasupongayya, S.-H. Chiang & B. Massey, "Search-based Job Scheduling for Parallel Computer Workloads", in Proc. of the 2005 IEEE Cluster, Boston, MA, Sep 2005.


  • S. Vasupongayya & B. Massey, "Constraint-Based Layout using 'Boxes and Glue' Model", at the 2004 GHC, Chicago, IL, Oct 2004.


  • S. Vasupongayya, R. Santiago, T. Shannon & G. Lendaris, "Minimal Model for Dual Heuristic Programming", in Proc. of IASTED ISC'04, Honolulu, Hawaii, Aug 2004.


  • S. Vasupongayya, R. Renner & B. Juliano, "Model Generation of Network Ensembles using Two-Level Cross-Validation" in Proc. of ICCSA'01, San Francisco, CA, May, 2001


  • S. Vasupongayya, "Investigation of Two-Level Cross-Validation within a Neural Networks framework", Master thesis, California State University Chico, 2001

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